1. Field of the Invention
The invention relates to a planarizing apparatus and a method of its use to increase uniformity in removal rates across a workpiece surface, such as a semiconductor wafer surface.
2. Background of the Invention
In the manufacture of integrated circuit semiconductor devices, a series of wafer masking and processing steps are used to fabricate each integrated circuit over the polished surface of a wafer. These masking and processing steps often result in the formation of topographical irregularities, such as "steps," on the wafer surface. Serious problems can result from these topographical irregularities if left present during subsequent processing of the integrated circuits on the wafer surface. For instance, step formations may cause focusing problems during optical lithography and the lack of surface planarization may make it difficult to form subsequent layers of metal interconnect. Consequently, planarizing an undulated surface layer, e.g., a dielectric layer residing on the surface of a wafer after metallization or other stages, has been conventionally practiced in semiconductor device fabrication to avoid such problems.
One popular conventional technique for planarizing is chemical-mechanical planarizing ("CMP"). A CMP process generally involves holding and rotating a thin wafer of semiconductor material against a polishing surface under controlled pressure and temperature while the polishing surface-wafer interface is continuously wetted with an abrasive slurry. CMP equipment used to perform planarizing of a semiconductor wafer generally includes a polishing pad supported on a rotatable platen, and a rotatable wafer holder which can apply a controlled downward pressure to the wafer to press the wafer against the top surface of the polishing pad. During planarizing and polishing, the polishing pad and wafer are typically rotated in the same direction. While the wafer and polishing pad rotate, the wafer is also horizontally translated back and forth by the wafer holder across the surface of the polishing pad. This oscillating motion covers a linear distance referred to as an oscillating range. During operation, a slurry of colloidal silica or another suitable abrasive is introduced between the outer surface of the wafer and the polishing pad. An etchant can be mixed in with the slurry to chemically assist removal of the surface material from the wafer. The reaction between the slurry and the wafer surface layer, such as a dielectric layer, under the polishing motion results in chemical-mechanical removal of the wafer surface material. Representative illustrations of the basic conventional scheme of the polishing pad, wafer holder and slurry features in a CMP apparatus are taught, for example, in U.S. Pat. Nos. 5,177,908 and 5,234,867. Ideally, the wafer surface topography should be uniformly planarized by CMP processing.
However, a persistent problem encountered in CMP processing is the non-uniform removal of the semiconductor surface. In particular, removal rates tend to be higher at the wafer edge than at the central portion of the wafer because the wafer edge is rotating at a higher speed than the wafer center. This phenomenon is referred to as the "leading edge effect." Other factors contributing to the problem of non-uniform removal include non-uniform wafer pressure, and uneven slurry distribution.
The prior art has proposed to redress the problem of nonuniform planarizing and polishing by modifying the polishing pad itself. For instance, patterns or special configurations have been formed in the shape of the polishing pad, such as taught, for example, in U.S. Pat. Nos. 5,177,908, 5,234,867 and 5,435,772.
U.S. Pat. No. 5,435,772, in particular, describes a variegated polishing pad for polishing semiconductor wafer in which the polishing pad itself is configured with a varied height or a varied compressibility for the stated purposes of improving polishing uniformity. In a dual height polishing pad arrangement taught by U.S. Pat. No. 5,435,772, the surface of the polishing pad is contoured to present an inner circular section that is thicker and thus projects beyond a surrounding concentric region of the pad. The wafer's leading edge can overhang the lower portion of the pad during polishing. In a separate embodiment the pad has an even surface except adjoining regions of different compressibility are provided such that the wafer's leading edge overhangs the lower portion of the pad. The directions of rotation of both the wafer and polishing pad extend generally tangentially to both the profiles of the leading edge of the wafer and the overhung outer edge of the upraised pad portion in U.S. Pat. No. 5,435,772.
However, the pad and wafer geometry of U.S. Pat. No. 5,435,772 can be expected to result in a tendency for the abrasive slurry to be pushed out of the vicinity of the pad-wafer interface and out from beneath the overhang of the wafer's leading edge. Once so pushed out, the slurry will be slung away from the polishing pad-wafer interface where needed. The resulting disturbances or even disruptions in the supply of abrasive slurry at the polishing pad-wafer interface could adversely impact the outcome of the planarization procedure.